################################################################################
# vls (VideoLAN Server) input's dependencies makefile
#-------------------------------------------------------------------------------
# (c)1999-2001 VideoLAN
# $Id: Makefile.module.dep,v 1.3 2002/12/08 15:55:29 nitrox Exp $
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###############################################################################
# Note on generic rules and dependencies
###############################################################################
# Note on dependencies: each .cpp file is associated with a .d file, which
# depends of it. The .o file associated with a .cpp file depends of the .d, of
# the .cpp itself, and of Makefile. The .d files are stored in a separate dep/
# directory.
# The dep directory should be ignored by CVS.
# Note on inclusions: depending of the target, the dependencies files must
# or must not be included. The problem is that if we ask make to include a file,
# and this file does not exist, it is made before it can be included. In a
# general way, a .d file should be included if and only if the corresponding .o
# needs to be re-made.
# The object Makefile knows how to make a .o from a .cpp, and includes
# dependencies for the target, but only those required.
# All settings and options are passed through main Makefile
################################################################################
# Default target
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default:
@echo "This Makefile should not be called directly,"
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# Dependencies creation
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# A dependencies file needs to be rebuilt if the .c changed or if one of the
# dependencies files have been changed. In other words, it depends from the
# .c and from itself.
-include $(MAKECMDGOALS)
$(MODULE_DEP): dep/%.d: %.cpp
@test -d dep/$(dir $*) || mkdir -p dep/$(dir $*)
@echo "Generating dependancies for $<..."
@$(SHELL) -ec '$(CXX) $(DCFLAGS) $(MODULE_DCFLAGS) $(INCLUDE) $< \
| sed '\''s/$(subst .,\.,$(notdir $*))\.o[ :]*/$(subst /,\/,$*).o : \
dep\/$(subst /,\/,$*).d : /g'\'' > $@; \
[ -s $@ ] || rm -f $@'
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